1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly, to a level shifter which is used in the semiconductor integrated circuit.
2. Description of Related Art
A level shifter is a circuit which is widely used in semiconductor integrated circuits. The level shifter shifts a level of a signal input through an input terminal to a higher level and outputs the signal at the higher level. U.S. Patent Application Publication No. 2005/0195676 A1 discloses an example of such level shifter. The level shifter may be classified as a latch type level shifter as illustrated in FIG. 1 or a non-latch type level shifter as illustrated in FIG. 2.
As semiconductor manufacturing processes are becoming more precise, smaller source voltages are applied to a semiconductor integrated circuit. Accordingly, an external source voltage cannot be applied as is to the semiconductor integrated circuit. The external source voltage needs to be lowered to generate an internal source voltage that can be applied to the semiconductor integrated circuit. In FIGS. 1 and 2, VDD1 denotes an internal source voltage and VDD2 denotes an external source voltage.
Typically, when the semiconductor integrated circuit is in a deep standby mode, that is, when the internal source voltage VDD1 does not need to be applied to the semiconductor integrated circuit, a level of the internal source voltage VDD1 is the same as a level of a ground voltage VSS in order to remove a leakage current while the external source voltage VDD2 is kept constant.
The latch type level shifter of FIG. 1 is used to prevent generation of the leakage current by maintaining data when the semiconductor integrated circuit is in a deep standby mode. The latch type level shifter does not generate a leakage current, however, the latch type level shifter cannot shift a level of an output signal OUT to a sufficiently high level when the applied source voltage VDD1 is low.
The non-latch type level shifter of FIG. 2 can shift a level of an output signal OUT to a sufficiently high level even when the applied source voltage VDD1 is low. However, the non-latch type level shifter cannot prevent generation of the leakage current when the semiconductor integrated circuit is in a deep standby mode, that is, when a level of the source voltage VDD1 is the same as a level of the ground voltage VSS and the source voltage VDD2 is kept constant.